1. Field of the Invention
The present invention relates to a method for driving a liquid crystal display device, and more particularly to a method for driving a matrix liquid crystal display device having plural pixels arranged in a matrix.
2. Related Background Art
In recent years, liquid crystal display devices have been commercialized in various fields such as display for a word processor, a personal computer or the like, electronic view finder for a video camera, projection television or displays for an automobile. Also, there is a need for an image display of larger size, higher resolution and a higher image quality.
FIG. 1 schematically shows the configuration of such liquid crystal display device, applied for use with a television receiver.
FIG. 1 shows a vertical shift register 10; a horizontal shift register 20; switching transistors 22; a common signal line 24; a signal inverting circuit 30; a clock generator circuit 40; a liquid crystal display panel 100; address signal lines V.sub.1, V.sub.2, . . . , V.sub.m-1, V.sub.m ; vertical data signal lines D.sub.1, D.sub.2, . . . , D.sub.n ; a signal S bearing image information; and an output signal S' bearing image information, released from the signal inverting circuit 30.
The vertical data signal lines D.sub.1 -D.sub.n are connected, respectively, through the horizontal transfer switches 22, to the signal line 24, and the gates of the horizontal transfer switches 22 receive signals from the horizontal shift register 20, in response to the signal from the clock generator circuit 40. The signal from the clock generator circuit 40 is also supplied to the vertical shift register 10, thus driving the address signal lines V.sub.1 -V.sub.m in succession in synchronization with the signal S. The signal from the clock generator circuit 40 is further supplied to the signal inverting circuit 30, thereby inverting the signal S in synchronization therewith. The clock generator circuit 40 is given an unrepresented synchronization signal, prepared from the image information bearing signal S, in order to achieve synchronization with the signal S.
In this manner the vertical shift register 10, the horizontal shift register 20 and the signal inverting circuit 30 effect the desired television scanning operation, by means of the pulses prepared by the clock generator 40.
In the liquid crystal panel 100, a row of pixels is selected by the address signal lines V.sub.1 -V.sub.m from the vertical shift register 10, and the vertical data signal lines D.sub.1 -D.sub.n are selected by the successive activations of the horizontal transfer switches 22 by driving pulses H.sub.1 -H.sub.m from the horizontal shift register 20, whereby image signals are supplied to the respective pixels.
As explained in the foregoing, the input terminals of the horizontal transfer switches 22 are connected, through the common signal line 24, to the signal inverting circuit 30, which is provided for converting the input image signal into an AC drive signal, in order to prevent deterioration in the characteristics of the liquid crystal. For AC driving of liquid crystal, there are already known various methods such as frame inversion, field inversion, 1H (horizontal scanning period) inversion and bit (every pixel) inversion.
FIG. 2 is an equivalent circuit of the liquid crystal panel 100 shown in FIG. 1. In FIG. 2, there are only shown four pixels driven with the data signal lines D.sub.1, D.sub.2 and the address signal lines V.sub.1, V.sub.2 within the liquid crystal panel 100.
Referring to FIG. 2, there are shown liquid crystal pixels 5; switching transistors 7 respectively attached to the pixels; common electrode lines 16; and additional capacitances 9. Electrodes of the liquid crystal pixel 5 and the additional capacitance 9 are electrically connected to the output side of the respective switching transistor 7, and the other electrodes are connected to the common electrode line 16. The input terminals of the switching transistors 7 are electrically connected, in groups of respective vertical columns of pixels, to the data signal lines D.sub.1, D.sub.2. Also the address signal lines V.sub.1, V.sub.2 are electrically connected, in groups of respective horizontal rows of pixels, to the gates of the switching transistors 7.
In FIG. 2, C.sub.LC and C.sub.S respectively indicate the equivalent capacitance of the liquid crystal pixel and the additional capacitance.
FIG. 3 is a timing chart showing an example of the output signal S' from the signal inverting circuit 30. The input signal S bearing image information is converted into the output signal S' by inversion by every 1H. In FIG. 3, V.sub.LC is the potential of the common electrode, V.sub.DL is the black level of the positive image signal, V.sub.WL is the white level thereof, V.sub.DH is the black level of the negative image signal, and V.sub.WH is the white level thereof.
As the signal inversion generates an image signal symmetrical to the common electrode potential V.sub.LC, the entire signal amplitude (V.sub.DL -V.sub.DH) is equal to twice of (V.sub.DL -V.sub.LC), so that it becomes about 10 V if the potential difference between V.sub.DL and V.sub.LC is about 5 V.
In the circuit shown in FIG. 2, if the switching transistors 7 and the horizontal transfer switches 22 are composed of p-MOS transistors, each transistor becomes non-conductive in response to an input signal of a voltage lower than the threshold voltage V.sub.th of said transistor. In most cases, for maintaining the non-conductive state in a range from the ground potential G.sub.ND to V.sub.DL in consideration of the operating margin, the voltage of the image signal S' is made larger than the potential difference mentioned above. In the foregoing example, this signal voltage is usually taken as about 13 V or larger.
As the above-explained driving method involves a high driving voltage, a high voltage resistance is required in the driving devices for the liquid crystal display device, and a matching design is required for the wirings etc. This fact inevitably leads to a lowered production yield, a higher cost and a higher power consumption of the liquid crystal display device.
In order to overcome such drawbacks, there have been proposed methods as disclosed in the Japanese Patent Laid-open Application Nos. 54-98525 and 1-138590.
The method disclosed in the Japanese Patent Laid-open Application No. 54-98525 consists of inverting the common electrode potential V.sub.LC in synchronization with the inversion of the image signal S', thereby selecting a same amplitude range for the positive and negative image signals and reducing the entire signal amplitude range to about 1/2.
However, such a method may lead to the following difficulty.
Usually the liquid crystal capacitance C.sub.LC is in the order of several ten pF, while the additional capacitance C.sub.S is about 100 pF. If the toal capacitance for a pixel is 100 pF, the total capacitance of the entire liquid crystal display device becomes about 10,000 pF when it is applied to a television display, as there are at least required 100,000 pixels.
Consequently, for driving such liquid crystal display device, for example with a signal amplitude range of ca. 7 V, there is required a high-speed pulse drive of a load capacitance of 10,000 pF with a potential difference of ca. 7 V. Such requirement inevitably results in an increased magnitude and an elevated cost of the driving circuits.
Moreover, the number of pixels of the liquid crystal display device increases to achieve color display or a higher image quality. For this reason, the capacitance of the device will correspondingly increase, for example to 30,000 pF for 300,000 pixels, or 50,000 pF for 500,000 pixels, making cost reduction and compactization of the driving circuits more difficult to achieve.
On the other hand, the method disclosed in the Japanese Patent Laid-open Application No. 1-138590 consists of employing separate common electrodes for the liquid crystal and for the additional capacitance, and applying an inversion potential to the common electrode of the liquid crystal.
Also, this method results in a similar difficulty, as a high-speed drive is required for a total liquid crystal capacitance of several thousand pF for example for 100,000 pixels.
Besides, in this case, the image signal voltage V.sub.LC ' applied to the liquid crystal for inverting the common electrode potential V.sub.LC for the liquid crystal of a capacitance smaller than the additional capacitance varies at maximum: EQU V.sub.LC .times.C.sub.S /(C.sub.LC +C.sub.S).
Consequently, though a proper voltage can be applied at the entry of the image signal to the liquid crystal, such voltage can no longer be applied during the voltage-maintaining period.
Such difficulty may be overcome by selecting the additional capacitance C.sub.S sufficiently smaller than the liquid crystal capacitance C.sub.LC. However, in such a case, the total capacitance per pixel becomes too small for maintaining the signal voltage, so that satisfactory image display performance is difficult to obtain.
As explained in the foregoing, the conventional driving methods for the liquid crystal display device involve a very large signal voltage because of the threshold voltage V.sub.th of the transistors present in the display device and also because of the image signal amplitude extending in the positive and negative polarities, thereby requiring designs with high voltage resistance in the signal processing IC, drive pulse generating IC, liquid crystal display panel, other peripheral circuits and wirings, thus leading to a larger dimension and an elevated cost of the liquid crystal display device.